/*
 * Copyright 2022 MindMotion Microelectronics Co., Ltd.
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include "board_init.h"
#include "delay.h"

#if 0
#include "sfud.h"
#include "lfs.h"

lfs_t app_lfs;
lfs_file_t app_lfs_file;
struct lfs_config app_lfs_config;

int lfs_flash_init(struct lfs_config *c);
#endif

#if 0

#define APP_DMA_BUFF_COUNT (16u * 2u)  /* Xfer buffer length. */
int16_t sound_buf[APP_DMA_BUFF_COUNT] = 
{
/* left   right */
    0,      0,
    3535,   3827,
    5000,   7071,
    3535,   9238,
    0,      10000,
    -3535,  9238,
    -5000,  7071,
    -3535,  3827,
    0,      0,
    3535,   -3827,
    5000,   -7071,
    3535,   -9238,
    0,      -10000,
    -3535,  -9238,
    -5000,  -7071,
    -3535,  -3827,
};

void app_i2s_master_tx_dma_init(void)
{
	    /* Setup the DMA for I2S RX. */
    DMA_Channel_Init_Type dma_channel_init;

    dma_channel_init.MemAddr           = (uint32_t)(sound_buf);
    dma_channel_init.MemAddrIncMode    = DMA_AddrIncMode_IncAfterXfer;
    dma_channel_init.PeriphAddr        = I2S_GetTxDataRegAddr(BOARD_I2S_PORT);  /* use tx data register here. */
    dma_channel_init.PeriphAddrIncMode = DMA_AddrIncMode_StayAfterXfer;
    dma_channel_init.Priority          = DMA_Priority_Highest;
    dma_channel_init.XferCount         = APP_DMA_BUFF_COUNT;
    dma_channel_init.XferMode          = DMA_XferMode_MemoryToPeriph;
    dma_channel_init.ReloadMode        = DMA_ReloadMode_AutoReloadContinuous;             /* DMA_AutoReloadMode_Circular */
    dma_channel_init.XferWidth         = DMA_XferWidth_16b;
    DMA_InitChannel(BOARD_DMA_I2S_PORT, BOARD_DMA_I2S_CHN, &dma_channel_init);

    /* Enable DMA transfer done interrupt. */
    DMA_EnableChannelInterrupts(BOARD_DMA_I2S_PORT, BOARD_DMA_I2S_CHN, DMA_CHN_INT_XFER_DONE, true);
    NVIC_EnableIRQ(BOARD_DMA_I2S_IRQn);

    /* Setup the I2S. */
    I2S_Master_Init_Type i2s_master_init;

    i2s_master_init.ClockFreqHz  = BOARD_I2S_FREQ;
    i2s_master_init.SampleRate   = BOARD_I2S_SAMPLE_RATE;
    i2s_master_init.DataWidth    = BOARD_I2S_DATA_WIDTH;
    i2s_master_init.Protocol     = BOARD_I2S_PROTOCOL;
    //i2s_master_init.EnableMCLK   = true;
		i2s_master_init.EnableMCLK   = true;
    i2s_master_init.Polarity     = BOARD_I2S_CPOL;
    i2s_master_init.XferMode     = I2S_XferMode_TxOnly;

    I2S_InitMaster(BOARD_I2S_PORT, &i2s_master_init);

    I2S_EnableDMA(BOARD_I2S_PORT, true);

    I2S_Enable(BOARD_I2S_PORT, true);

    DMA_EnableChannel(BOARD_DMA_I2S_PORT, BOARD_DMA_I2S_CHN, true);
}
/* I2S IRQ. */
void BOARD_DMA_I2S_IRQHandler(void)
{
    if (0u != (DMA_GetChannelInterruptStatus(BOARD_DMA_I2S_PORT, BOARD_DMA_I2S_CHN) & DMA_CHN_INT_XFER_DONE) )
    {
        DMA_EnableChannel(BOARD_DMA_I2S_PORT, BOARD_DMA_I2S_CHN, true);
        DMA_ClearChannelInterruptStatus(BOARD_DMA_I2S_PORT, BOARD_DMA_I2S_CHN, DMA_CHN_INT_XFER_DONE);
    }
}
#endif

#define SOUND_BUF_SIZE 16u

/*
 * Variables.
 */

/* The data of right channel to be transmitted. */
const int16_t sound_buf_right[SOUND_BUF_SIZE]  =
{
    0,  3827,  7071,  9238,  10000,  9238,  7071,  3827,
    0, -3827, -7071, -9238, -10000, -9238, -7071, -3827
};

/* The data of right channel to be transmitted. */
const int16_t sound_buf_left[SOUND_BUF_SIZE] =
{
    0, 3535, 5000, 3535, 0, -3535, -5000, -3535,
    0, 3535, 5000, 3535, 0, -3535, -5000, -3535,
};

/* Index of left channel data to be transmitted. */
uint32_t sound_buf_index_left  = 0u;

/* Index of right channel data to be transmitted. */
uint32_t sound_buf_index_right = 0u;

/* I2S master init. */
void app_i2s_master_init(void)
{
    I2S_Master_Init_Type i2s_master_init;
    i2s_master_init.ClockFreqHz  = BOARD_I2S_FREQ;
    i2s_master_init.SampleRate   = BOARD_I2S_SAMPLE_RATE;
    i2s_master_init.DataWidth    = BOARD_I2S_DATA_WIDTH;
    i2s_master_init.Protocol     = BOARD_I2S_PROTOCOL;
    i2s_master_init.EnableMCLK   = true;
    i2s_master_init.Polarity     = BOARD_I2S_CPOL;
    i2s_master_init.XferMode     = I2S_XferMode_TxOnly;

    I2S_InitMaster(BOARD_I2S_PORT, &i2s_master_init);

    /* Enable I2S tx buffer empty interrupt. */
    I2S_EnableInterrupts(BOARD_I2S_PORT, I2S_INT_TX_EMPTY, true);
    NVIC_EnableIRQ(BOARD_I2S_IRQn);

    I2S_Enable(BOARD_I2S_PORT, true);
}

/* Put data to left channel. */
void app_i2s_put_data_left(void)
{
    I2S_PutData(BOARD_I2S_PORT, (uint32_t)sound_buf_left[sound_buf_index_left]);
    sound_buf_index_left++;
    if (sound_buf_index_left >= SOUND_BUF_SIZE)
    {
        sound_buf_index_left = 0u;
    }
}

/* Put data to right channel. */
void app_i2s_put_data_right(void)
{
    I2S_PutData(BOARD_I2S_PORT, (uint32_t)sound_buf_right[sound_buf_index_right]);
    sound_buf_index_right++;
    if (sound_buf_index_right >= SOUND_BUF_SIZE)
    {
        sound_buf_index_right = 0u;
    }
}

/* I2S interrupt handler. */
//void BOARD_I2S_IRQHandler(void)
	
void SPI2_IRQHandler(void)
{
    /* Get interrupt status. */
    uint32_t flag = I2S_GetInterruptStatus(BOARD_I2S_PORT);

    if (0u != (flag & I2S_INT_TX_EMPTY) )
    {
        if (I2S_Channel_Left != I2S_GetXferChannel(BOARD_I2S_PORT) )
        {
            app_i2s_put_data_left();  /* Send right data, buffer put left data to prepare next send. */
        }
        else
        {
            app_i2s_put_data_right(); /* Send left data, buffer put right data to prepare next send. */
        }
    }

    /* Clear interrupt status. */
    I2S_ClearInterruptStatus(BOARD_I2S_PORT, flag);
}

void app_delay(uint32_t t)
{
    for (uint32_t i = 0u; i < t; i++)
    {
        for (uint32_t j = 0u; j < 100u; j++)
        {
            __NOP();
        }
    }
}


int main(void)
{
    BOARD_Init();
		//DELAY_Init();
    printf("i2s_master_dma.\r\n");
	
	 // app_i2s_master_tx_dma_init();
		app_i2s_master_init();
	  printf("finish set\n");
	  while(1)
		{
			
		}
	
	 
}

/* EOF. */
